proj:hijack-fram:start
Table of Contents
FRAMjack
This project is a rebuilt HiJack with a new MSP430 on the board. Instead of the MSP430F1611 we are using a MSP430FR5969. This new MSP has FRAM for its code and data. We hope this allows more phones to be able to power and support the HiJack platform.
Pin Header Interface
| Bank | Pin Number | HiJack | FRAMjack rev c | Difference | FRAMjack rev d | Standard Interface | ||
|---|---|---|---|---|---|---|---|---|
| Group | Pin | Notes | ||||||
| Right | 1 | VCC | VCC | same | VCC | Power | VCC | 2.5 - 3 V |
| 2 | GND | GND | same | GND | GND | |||
| 3 | RST | RST | same | RST | BSL | Entry Sequence Signal | ||
| 4 | TCK | TEST | same | TEST | Entry Sequence Signal | |||
| 5 | P6.4/A4 | TDI | P1.4/A4 | Power | PGOOD | fix framjack d | ||
| 6 | P6.5/A5 | TMS | P1.5/A5 | Analog | Analog 1 | fix framjack d | ||
| 7 | P6.6/A6/DAC0 | TCK | TCK | Analog 2 | fix framjack d | |||
| 8 | P6.7/A7/DAC1/SVSIN | P4.0/A8 | close | TMS | GPIO/Other | |||
| 9 | P3.6/UTXD1 - P1.1/BSLTX | P2.0/TB0.6/UCA0TXD/UCA0SIMO/TB0CLK/ACLK | same | P2.0/UCA0TXD | BSL | Data Transmit | ||
| 10 | P3.7/URXD1 - P2.2/BSLRX | P2.1/TB0.0/UCA0RXD/UCA0SOMI/TB0.0 | same | P2.1/UCA0RXD | Data Receive | |||
| Top | 11 | P1.2/TA0 | P4.1/A9 | TDO | GPIO/Other | |||
| 12 | P1.3/TA2 | P2.5/TB0.0/UCA1TXD/UCA1MOSI | TDI | |||||
| 13 | P2.0/ACLK | P2.6/TB0.1/UCA1RXD/UCA1MISO | P4.0 | Interrupt GPIO | Interruptable Pin 1 | |||
| 14 | P2.6/ADC12CLK/DMAE0 | P2.2/TB0.2/UCB0CLK | P3.5 | Interruptable Pin 2 | ||||
| 15 | P3.0/STE0 | P3.4/TB0.3/SMCLK | P3.4 | GPIO/Other | ||||
| 16 | P3.1/MOSI0/SDA | P3.5/TB0.4/COUT | UCB0SDA | I2C | I2C Data | External peripheral needs pull up resistors. | ||
| 17 | P3.2/MISO0 | P1.6/TB0.3/UCB0MOSI/UCB0SDA/TA0.0 | P3.3 | GPIO/Other | ||||
| 18 | P3.3/UCLK0/SCL | P1.7/TB0.4/UCB0MISO/UCB0SCL/TA1.0 | close | UCB0SCL | I2C | I2C Clock | ||
| 19 | P3.4/UTXD0 | P2.3/TA0.0/UCA1STE/A6/C10 | UCA1TXD | UART | UART Transmit | |||
| 20 | P3.5/URXD0 | P2.4/TA1.0/UCA1CLK/A7/C11 | UCA1RXD | UART Receive | ||||
| Left | 21 | P4.5/TB5 | P1.0/TA0.1/DMAE0/RTCCLK/A0/C0/VREF-/VeREF- | P1.0/TA0.1 | PWM | PWM 1 | ||
| 22 | P4.6/TB6 | P1.1/TA0.2/TA1CLK/COUT/A1/C1/VREF+/VeREF+ | P1.1/TA0.2 | PWM 2 | ||||
| 23 | P5.0/STE1 | P1.3/TA1.2/UCB0STE/A3/C3 | UCB0STE | SPI | SPI Enable | |||
| 24 | P5.1/MOSI1 | P1.4/TB0.1/UCA0STE/A4/C4 | UCB0MOSI | SPI MOSI | ||||
| 25 | P5.2/MISO1 | P1.5/TB0.2/UCA0CLK/A5/C5 | UCB0MISO | SPI MISO | ||||
| 26 | P5.3/UCLK1 | TDO | UCB0CLK | SPI Clock | ||||
| 27 | Audio Jack Mic | Audio Jack Mic | same | Mic | Audio | Mic | ||
| 28 | Audio Jack Left | Audio Jack Left | same | Left | Left | |||
| 29 | VHARVEST | VHARVEST | same | PGOOD | Power | VHARVEST | fix framjack d | |
| 30 | Audio Jack Right | Audio Jack Right | same | Right | Audo | Right | ||
Notes
Build iHex from Code Composer
Build Settings -> Build -> Steps -> Apply Predefined Step
proj/hijack-fram/start.txt · Last modified: 2012/12/07 18:23 by bradjc
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